As an XY address type image sensor, there has hitherto be known the CMOS image sensor disclosed in IEEE TRANSACTIONS ON ELECTRON DEVICE VOL 41, PP 452-453, 1994, and so on. This image sensor has many advantages, such as high S/N ratio, low power consumption and on-chip peripheral circuitry. With this sensor, however, it is difficult to perform a simultaneous electronic shutter operation for all pixels as employed in interline type CCD image sensors, due to such reasons as the usage voltage being limited, or the number of elements constituting one pixel being large.
To overcome this drawback, there has been proposed, for example, a configuration of the image sensor described in Japanese Patent Laid-Open No. 11-177076. In this conventional CMOS image sensor, in order to implement a simultaneous electronic shutter function for all pixels, a storage part for temporarily storing charges is provided between a photo-electric conversion part and amplifier, and a first transfer part is provided between the photo-electric conversion part and storage part, and a second transfer part between the storage part and amplifier.
FIG. 9 illustrates a one-pixel configuration of the conventional CMOS image sensor.
Referring to FIG. 9, a first transfer part 1a, second transfer part 1b and reset part 1c are all turned on, and charges of a photodiode PD are reset. The accumulation operation of the image sensor is initiated by turning off the first transfer part 1a. Specifically, at this timing, the photodiode PD generates and accumulates charges according to an object image formed by an optical system (not shown). At the time when a predetermined accumulation time has elapsed, the first transfer part 1a is turned on to transfer the charges accumulated in the photodiode PD to a storage part 1e. In advance of this operation, the second transfer part 1b has been turned off. After the transfer is terminated, the first transfer part 1a is turned off. By performing the on and off operation of the first transfer part 1a simultaneously for the entire screen, the exposure state of the image sensor is terminated, i.e., an electronic shutter operation is implemented. Subsequently, the charges accumulated in the storage part 1e are read sequentially. By turning off the reset part 1c and turning on the second transfer part 1b, the charges of the storage part 1e are transferred to an amplifier JFET and read out to the outside after amplification.
In solid state image sensors like the above-described conventional example, however, the photodiode PD and storage part 1e are disposed adjacent to each other. Therefore, while the charges are being held in the storage part 1e, i.e., during a time period from when the charges of the photodiode PD are transferred to the storage part 1e to when the charges are outputted via the amplifier JFET, unwanted charges may leak from the photodiode PD, or the storage part 1e may be directly exposed to light to generate unwanted charges. Also, even when the electronic shutter operation is not needed, the charges must be transferred via the first transfer part 1a, storage part 1e and second transfer part 1b, thus making the operation complex.